Bit Interleaver for LDPC

The bit interleaver is used in LDPC to minimize the damage caused by frequency selective channels to LDPC codes’s error correction capability. LDPC codes perform poorly for burst errors. The bit interleaver distribute the localized erroneous bits across the length of the block which results in improved performance.

Note

Bit interleaver improves the LDPC performance against burst and symbols errors.

Bit Interleaver

The details about the input-output interface of the Mapper modules is provided below.

class toolkit5G.Ratematcher.LDPC.BitInterleaver(modOrder)[source]

This class performs Bit Interleaving part pf Rate Matching for LDPC. Bit Interleaving only re-orders the bit sequence it doesn’t alter the length or shape of the input bits. The details of the implementation of Bit Interleaver for LDPC are provided in section 5.4.2.2 of [3GPPTS38212pdsch].

Parameters:: modOrder (int) – Defines modulation order or number of bits per symbols in symbol mapping/de-mapping. It takes integer values from set \(\in \{1, 2, 4, 6, 8, 10\}\).
Input:: inBits ([k,], list where k can be either 1 or 2.) – A list of rate matched codewords. The list can have either 1 or 2 codeword-segments based on the condition specified in 3GPP TS 38.212 version 16 Section 5.4.2.1. The dimension of codeword-segments-i is [\(\dots\), \(\text{N}_\text{G}^\text{i}\), \(\text{E}_\text{i}\)] where \(\text{N}_\text{cb} = \sum_{\text{i}=0}^{\text{k}} \text{N}_\text{G}^\text{i}\) and \(\text{E}_\text{i}\) is number of rate-matched bits for codeword-segments-i. The details of computation of \(\text{N}_\text{G}^\text{i}\) and \(\text{E}_\text{i}\) are provided in section 5.4.2.1 of [3GPPTS38212pdsch].

Note

The codeblock-segments are created in bit-selection to have \(\text{G} = \sum_{\text{i}=0}^{\text{k}} \text{N}_\text{G}^\text{i} \times \text{E}_\text{i}\) which ensure that rate matched bits fit into the allocated time-frequency OFDM resources.

Warning

The number of bits per codeword-segment must be a multiple of modOrder.

Output:

[k,], list where k is defined in input. – The shape of each codeword-segments in the output matches the shape of each codeword-segments in the input list.

Raises:

ValueError – [Error]: ‘inBits’ must be a Python list type variable!
ValueError – [Error]: length of input List can either be 1 or 2!
ValueError – [Error]: ‘modOrder’ must be an integer!
ValueError – [Error]: modOrder must take value from the set {1, 2, 4, 6, 8, 10}
ValueError – [Error]: ‘Number of Bits’ must be an integer!
ValueError – [Error]: ‘Number of Bits’ must be an integer multiple of ‘modOrder’!
ValueError – [Error]: ‘Number of Bits-2’ must be an integer!
ValueError – [Error]: ‘Number of Bits-2’ must be an integer multiple of ‘modOrder’!

property modOrder: Modulation Order

property numBits1: Number of rate matched output bits of the code blocks belonging to group 1.

property numBits2: Number of rate matched output bits of the code blocks belonging to group 2

Bit De-interleaver

The details about the input-output interface of the Mapper modules is provided below.

class toolkit5G.Ratematcher.LDPC.BitDeinterleaver(modOrder)[source]

This class performs Bit De-Interleaving part of Rate Matching for LDPC.

Parameters:: modOrder (int) – Defines modulation order or number of bits per symbols in symbol mapping/de-mapping. It takes integer values from set \(\in \{1, 2, 4, 6, 8, 10\}\).
Input:: inBits ([k,], list where k can be either 1 or 2.) – A list of codewords containing either soft or hard bit information. The list can have either 1 or 2 codeword-segments based on the condition specified in 3GPP TS 38.212 version 16 Section 5.4.2.1. The dimension of codeword-segments-i is [\(\dots\), \(\text{N}_\text{G}^\text{i}\), \(\text{E}_\text{i}\)] where \(\text{N}_\text{cb} = \sum_{\text{i}=0}^{\text{k}} \text{N}_\text{G}^\text{i}\) and \(\text{E}_\text{i}\) is number of rate-matched bits for codeword-segments-i. The details of computation of \(\text{N}_\text{G}^\text{i}\) and \(\text{E}_\text{i}\) are provided in section 5.4.2.1 of [3GPPTS38212pdsch].